MEMRISTORS 2025

On the compact modelling of TiN/Ti/HfO2/W memristors at different time scales

  • Jiménez-Molinos, Francisco (Universidad de Granada)
  • Vinuesa, Guillermo (Universidad de Valladolid)
  • García, Héctor (Universidad de Valladolid)
  • Castán, Helena (Universidad de Valladolid)
  • Dueñas, Salvador (Universidad de Valladolid)
  • González, Mireia Bargalló (Institut de Microelectrònica de Barcelona, IM)
  • Campabadal, Francesca (Institut de Microelectrònica de Barcelona, IM)
  • Roldán, Juan Bautista (Universidad de Granada)

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Although resistive switching devices are electrically characterized by applying a ramp voltage stress, their actual operation generally involves the use of pulsed voltage signals. Consequently, a useful model for process design kits (PDKs) in electronic design automation (EDA) tools should perform reliably under both operation regimes, despite the significantly different time scales they could entail. This challenge is closely linked to what is known as the time-voltage dilemma [1], [2]: the same device must remain stable under low read voltages to function as a non-volatile memory, while it must also be programmable using slightly higher voltages (less than an order of magnitude greater [2]) within short timeframes to operate as a fast memory. These dual characteristics are compatible thanks to the pronounced non-linearity in the kinetics of the switching mechanisms [3]. The primary objective of this work is to study reset transitions under different applied voltages, with a focus on identifying the critical dependencies for successfully modelling these transitions over a broad range of time scales or operation regimes. For a quantitative characterization of the duration of the reset transitions, the time to reset (TtR) parameter (previously introduced in [4]) is defined as the time necessary for reducing the current to half of its initial value after the application of the voltage pulse. TiN/Ti/HfO2/W memristors were fabricated and characterized under ramped voltage operation. After programming the device in the low resistance state, reset transitions were performed under constant voltage stress using different pulse amplitudes and the corresponding TtRs were experimentally obtained [4]. Different modelling approaches are proposed to explain and simulate the reset transitions and the corresponding TtRs. [1] P. Huang et al., IEEE Transactions on nanotechnology, vol. 13, no. 6, pp. 1127-1132, 2014. [2] R. Dittmann, S. Menzel and R. Waser, Advances in Physics, vol. 70, no. 2, pp. 155-349, 2022. [3] S. Menzel et al., Advanced Functional Materials, vol. 21, pp. 4487-4492, 2011. [4] G. Vinuesa et al., Microelectronic Engineering, vol. 296, p. 112281, 2025. [5] X. Guan et al., IEEE Electron device letters, 33, 1405-1407, 2012