For decades, it was expected that the growth in computing power of a Von Neumann computing architecture would slow down, limiting computing ability to meet the growing demands of modern applications. While this architecture remains central to general-purpose computing, alternative paradigms have emerged that outperform such structures in specific tasks. One important example is the Cellular Nonlinear Network (CellNN) paradigm, introduced by Leon Chua. As being brain inspired, CellNNs employ locally connected analog processing units arranged in arrays to enable highly parallel and energy-efficient computation. Early CellNN realizations achieved an impressive performance in image processing with over 20,000 frames per second. However, scalability was constrained by the large area each analog cell required to support diverse tasks, restricting overall network size. The emergence of memristor technology has reignited interest in CellNNs by enabling miniaturized and efficient analog universal computation. Memristors offer high-density integration, non-volatility, and analog tunability, allowing for more compact and capable CellNN implementations. These advances have stimulated renewed efforts toward developing memristor-based CellNNs (M-CNNs) for fast and efficient image and multidimensional signal processing. In general, however, the consideration of memristors also introduce challenges, particularly device variability and noise, which are inherent in nanoscale systems and can affect M-CNN stability and performance. To study these effects, we derived stochastic models for synaptic weights that incorporate both deterministic and noise-driven components. Building on the established CNN theoretical framework, new stability criteria were proposed to capture memristor imperfections. In this context, the physics-based JART model for VCM devices is assumed to simulate realistic device behavior. Experimental variability data is used when applying our network models to evaluate performance under noisy conditions. As a case study, edge detection, a core image processing task, is investigated using M-CNNs, highlighting their robustness and huge potential for future computing. Despite the presence of noise and variability especially in memristive devices, these universal computing architectures represent a promising platform for energy-efficient, high-speed computing and may help usher in a new era of unconventional hardware accelerators.